Hiroshi Sawada's Home Page

Hiroshi Sawada

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Research Scientist
Adaptive Architecture Research Group

E-mail: sawada@cslab.kecl.ntt.co.jp
Address: NTT Communication Science Laboratories
2-4, Hikaridai, Seika-cho, Soraku-gun,
Kyoto 619-0237 Japan

Areas of Interest

CAD for VLSI, Logic synthesis, Optimization problems, Hardware design, Reconfigurable computing

Research Themes

Multilevel logic synthesis using implicit cube set representations
Simple disjunctive decompositions for logic optimization
Logic synthesis for LUT-based FPGAs
Variable ordering for binary decision diagrams

Publications

In English, In Japanese

Projects

PARTHENON: an electronic design automation system with a behavioral hardware description language SFL as its input
KUE-CHIP2: a microprocessor for education of computer hardware and LSI design

Biography

Hiroshi Sawada received the B.E. and M.E. degrees in information science from Kyoto University, Kyoto, Japan, in 1991 and 1993, respectively. In 1993, he joined NTT Communication Science Laboratories, where he has been engaged in research of computer aided design of digital systems and computer architecture. He is a member of the Institute of Electronics, Information and Communication Engineers (IEICE), and the Information Processing Society of Japan (IPSJ).

Hiroshi Sawada <sawada@cslab.kecl.ntt.co.jp>

Last modified: Tue Feb 12 11:12:00 2002