ShiGERu Yamashita

• Address: NTT Communication Science Laboratories
  2-4, Hikaridai, Seika-cho, Soraku-gun, Kyoto 619-0237 Japan
• E-mail: ger@cslab.kecl.ntt.co.jp

Research Activities

• Research Interests
  • Logic synthesis for "PCA"
  • Bi-decompositions for logic optimization
  • Logic synthesis for LUT-based FPGAs
• Publications (First Author Only)
  • In English
  • In Japanese
• Projects
  • PARTHENON