Aiming to Realize Adaptive Hardware

The purpose of our research is to develop reconfigurable computing systems whose structures can be flexibly adapted depending on the application.

We are expanding the original technologies used in PARTHENON, a design system for logic LSIs, to realize the above-mentioned adaptive architecture.

Current research includes application-specific processing technologies, logic synthesis techniques and design methodologies for reconfigurable computing systems.

• Design Automation Technologies for Realizing Reconfigurable Computing Systems
• Solving Problems using Reconfigurable Computing
• Logic Optimization by Effective Decompositions
• Performace-Driven Functional Decomposition and Circuit Minimization
• High-Level Synthesis for Fine-Grained Parallel Processing

• PARTHENON

• Akira Nagoya
• Kazuo Aoyama
• Hiroshi Sawada
• Shigeru Yamashita
• Hidehisa Nagano
• Eiji Kobayashi

Former Member

• Takayuki Suyama
• Akihiro Matsuura

Former Visitors

• Prof. Kazuo Nakajima (University of Maryland)
• David T. Wang (University of Maryland)
• Daniel F. Roddy (University of Maryland)
• Mikhail Itskovich (Virginia Tech)
• Takahiro Noda (Kyoto University)